1. Field of the Invention
The present invention relates to an improved interconnection structure in a semiconductor device. More particularly, the present invention relates to semiconductor devices having doped polysilicon contacts interconnecting impurity regions within the semiconductor device. The doped polysilicon contacts may be simultaneously formed in contact holes by a single polysilicon layer deposition to electrically connect the impurity regions. The present invention also relates to a method of making same.
2. Description of the Related Art
The complexity of integrated circuits continues to increase. The semiconductor industry thus faces new challenges in the successful fabrication of increasingly complex integrated circuits. This increasing complexity takes place in an environment of decreasing integrated circuit size. Accordingly, advances in fabrication technology are required to produce extremely complex, high-density integrated circuits.
Multi-layer metal interconnects have been commonly used to maintain the small size of high-density, integrated circuits. Typically, the metal interconnect layers are separated by an interlayer insulating layer and electrically coupled by metal-filled vias selectively formed through the insulating layer.
FIGS. 1A through 1C are exemplary flow diagrams illustrating a conventional method of forming interconnections in a semiconductor device.
Referring to FIG. 1A, n.sup.+ -type impurity region 12 and p.sup.+ -type impurity region 13 are formed in a semiconductor substrate 10. An interlayer insulating layer 14 is formed over the semiconductor substrate 10. Contact holes 16a and 16b are opened in interlayer insulating layer 14 thereby exposing portions of impurity regions 12 and 13.
Referring to FIG. 1B, ohmic contact layers 18a and 18b, of titanium silicide, for example, are formed in the bottom of contact holes 16a and 16b. After forming ohmic contact layers 18a and 18b, a metal layer 20 is deposited in contact holes 16a and 16b, thereby forming ohmic interconnection contacts to n.sup.+ -type impurity region 12 and to p.sup.+ -type impurity region 13, as shown in FIG. 1C. Conventionally, metal layer 20 may be formed of a tungsten or titanium nitride layer.
This conventional method of forming interconnections works well enough for larger, less complex semiconductor devices. However, contact holes in higher density semiconductor devices inevitably have increased aspect ratio, i.e., a smaller surface area opening in relation to the depth of the contact hole. Increased aspect ratio makes it difficult to acquire good step coverage in the fabrication process. This is particularly true when a conventional metal layer of tungsten or titanium silicide is used. Further, if heat is applied to the conventional metal layer by a subsequent process step, the metal layer may well lift, that is, be displaced from its desired position.